Printing electronic devices at home is now closer to reality
VIRTUS, IC Design Centre of Excellence at School of Electrical and Electronic Engineering (EEE@NTU) have developed a new way to print complex electronic circuits and systems using fully-additive processes. Their unique method is environmentally-friendly, low cost and scalable compared to subtractive or mixed processes, and produces components with high semiconductor carrier-mobility.
Printed electronics are usually thin, light and flexible, and can be used for, say, intelligent labels that track if milk cartons have been stored in required temperature ranges.
The field is dominated by subtractive-based processes such as laser ablation, where lasers are used to remove material from a solid. These processes, however, require specialised and expensive equipment, use corrosive chemicals and squander material. Other scientists’ attempts at fully additive processes, which involve only depositions onto a film, resulted in components with low printed semiconductor carrier-mobility, which would severely limit devices’ speed.
The EEE technique uses widely available silver paste, which has high electrical and thermal conductivity, for electrodes. The silver electrode is dipped in pentafluorobenzenethiol solution which increases its work function and overcomes the low carrier-mobility problem.
The researchers also used slot die coating to print the semiconductor layer. This results in fewer crystal grain boundaries, which quickens electrons’ flow, further increasing devices’ speed.
The technique can print passive elements including capacitors, resistors, inductors and two metal interconnect layers – to date, the only fully-additive process that can realise complex circuits and systems on flexible plastic films. To demonstrate its commercial viability, the researchers printed one proposed and two conventional differential amplifiers, and a 4-bit digital-to-analog converter.
The team also developed a comprehensive printed transistor model that is simple, accurate and compatible with industry-standard integrated circuit electronic design automation tools. This model allows manufacturers to simulate potential printed transistors’ operation, which is crucial for to design practical printed electronic circuits.
The researchers showed that, by using an appropriate layout, the mismatch between printed transistors can be reduced to a relatively low 8%, despite variations of up to almost 40% between inpidual transistors.
Dr Ge Tong, a senior research fellow at School of EEE, said: “What manufacturers get from the simulator will be very close to what they get if they print the actual circuit.”