Best Paper Award at IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2024)

WANG Siyi (above), a PhD student from Nanyang Technological University (NTU) under College of Computing & Data Science (CCDS), was honoured with the Best Paper Award at the IFIP/ IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2024). As the first author of the paper titled "Minimum Depth Quantum Modular Addition through Carry-Save Architecture," Siyi’s work stood out for its pioneering approach to optimizing quantum modular addition, contributing to the growing body of research in quantum cryptography and quantum computing.

 

The awarded paper showcases Siyi’s innovative contributions to the field, with significant implications for quantum arithmetic circuit design. Conducted under the supervision of Professor Anupam CHATTOPADHYAY (photo on left), the research also involved Eugene LIM Zhi Jie (photo on right), a CCDS undergraduate student working on his final year project (FYP). Together, they explored novel methods to enhance the performance of quantum modular addition, solidifying the paper’s impact on the quantum computing field.

 

 

 

 

The VLSI-SoC* conference, held in Tangier, Morocco, from October 6-9, 2024, is a prestigious forum that brings together researchers and professionals from around the world to discuss breakthroughs in VLSI design and related areas. With a limited number of submissions accepted, Siyi’s recognition as the Best Paper Award winner is particularly impressive, especially as the award is reserved for only top 1 paper presented at the conference.

Further details about the award-winning paper can be accessed through the conference proceedings later.

https://vlsisoc2024.nl

 

Note: 
*SoC: System-on-a-Chip