Transceiver Development Applicable for Hybrid “C-V2X + DSRC” V2X System

In recent years, Vehicle-to-Everything (V2X) has diverged into two different technologies - Dedicated Short-Range Communications (DSRC) and Cellular Vehicle-to-Everything (C-V2X) - with fundamentally different architectures, making it difficult to be harmonised into a single global solution. While DSRC-based V2X is deployed in the U.S., Europe, and Japan, C-V2X on the other hand is gaining momentum in other regions, including China. It is imperative to develop a single transceiver to support both DSRC based on the 802.11p / ITS-G5 standards and C-V2X based on 3GPP specifications suitable for future V2X global market.

In this project, the hardware platform will be utilised together with WP2 for measurement under real V2X communication scenarios. WP1 will focus on reconfigurable transceiver development using Complementary Metal Oxide Semiconductor (CMOS) technology applicable for both DSRC and C-V2X. The reconfigurable transceiver consists of three main blocks: receiver front-end, transmitter front-end and frequency synthesizer.

To achieve this, the project proposes to develop a radio frequency (RF) platform supporting both C-V2X and DSRC. As shown in Figure 1, the RF platform can provide a flexible selection between DSRC and C-V2X according to practical deployment situations. The baseband signal comes from external DSRC and C-V2X processing units.

The hybrid transceiver provides customers with a flexible selection between DSRC and C-V2X regardless of the V2X technology deployed in that region.

Currently, there is no product like a reconfigurable transceiver for hybrid “C-V2X+DSRC” V2X system that is available in the commercial market. As such the hybrid transceiver has great commercial value for the current and future V2X market.

As a means to this end, this project will also design, develop and implement a novel noise cancelling technique for better sensitivity which can be translated to longer communication range, a low phase noise frequency synthesizer to prevent a reduction in signal quality thus lowering the error rate of the communications link, and a highly efficient GaAs or GaN power amplifier to achieve a low power consumption transceiver system.